本文關鍵詞： 循環(huán)冗余校驗 G以太網(wǎng) 并行 循環(huán)冗余校驗魔數(shù) 門延時 邏輯資源　出處：《計算機工程》2016年05期 　論文類型：期刊論文

【摘要】：現(xiàn)有10G以太網(wǎng)中的循環(huán)冗余校驗(CRC)編譯碼器不能同時兼顧計算速度與資源占用,為此,設計一種新型的10G以太網(wǎng)并行CRC編譯碼器。編碼時,通過編碼預處理解決不定長字節(jié)帶來的CRC編碼問題,簡化CRC編碼電路的設計。譯碼時,通過譯碼預處理分離出以太網(wǎng)幀的幀校驗序列(FCS)域,恢復編碼預處理模塊輸出的數(shù)據(jù),簡化CRC校驗電路的設計。在實現(xiàn)CRC編碼校驗時對傳統(tǒng)的異或運算電路進行優(yōu)化,降低運算電路門延時,提高運算速度,并能自動切換CRC編碼校驗方法以兼容現(xiàn)有以太網(wǎng)。實驗結果表明,與其他3種方法相比,該方法占用邏輯資源少,計算速度快,可實現(xiàn)實時性輸出,同時滿足10G以太網(wǎng)156.25 MHz的時序要求。
[Abstract]:In the present 10G Ethernet, the cyclic redundancy check (CRC) encoder and decoder can not take into account the computation speed and the resource occupation simultaneously. Therefore, a new 10G Ethernet parallel CRC encoder and decoder is designed. In order to simplify the design of the CRC coding circuit, the CRC coding problem caused by the constant length bytes is solved by the encoding preprocessing. In decoding, the frame check sequence (FCS) domain of the Ethernet frame is separated by the decoding preprocessing, and the output data of the encoding preprocessing module is recovered. To simplify the design of CRC check circuit, optimize the traditional XOR operation circuit when realizing CRC code check, reduce the delay of operation circuit gate, and improve the operation speed. It can automatically switch the CRC coding verification method to compatible with the existing Ethernet. The experimental results show that compared with the other three methods, the proposed method takes less logical resources, has the advantages of fast computing speed, and can realize the real-time output. At the same time, it meets the timing requirement of 10G Ethernet 156.25 MHz.
【作者單位】： 暨南大學信息科學技術學院;
【基金】：廣東省科技計劃基金資助項目(2013B090800022) 廣東省工程技術研究中心基金資助項目(2012gczxA003)
【分類號】：TP393.11
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本文編號：1532279